AND gate

Input		Output
A	B	A AND B
0	0	0
0	1	0
1	0	0
1	1	1

The AND gate is a basic digital logic gate that implements logical conjunction (∧) from mathematical logic – AND gate behaves according to the truth table above. A HIGH output (1) results only if all the inputs to the AND gate are HIGH (1). If none or not all inputs to the AND gate are HIGH, LOW output results. The function can be extended to any number of inputs.

Symbols[]

There are three symbols for AND gates: the American (ANSI or 'military') symbol and the IEC ('European' or 'rectangular') symbol, as well as the deprecated DIN symbol. Additional inputs can be added as needed. For more information see Logic Gate Symbols. It can also be denoted as symbol "^" or "&".


MIL/ANSI symbol	IEC symbol	DIN symbol

The AND gate with inputs A and B and output C implements the logical expression $C=A\cdot B$ . This expression also may be denoted as $C=A\wedge B$ or $C=A\And B$ .

Implementations[]

AND gate using diodes
AND gate using transistors
NMOS AND gate

An AND gate can be designed using only N-channel (pictured) or P-channel MOSFETs, but is usually implemented with both (CMOS). The digital inputs a and b cause the output F to have the same result as the AND function. AND gates may be made from discrete components and are readily available as integrated circuits in several different logic families.

Analytical representation[]

$f(a,b)=a*b$ is the analytical representation of AND gate:

$f(0,0)=0*0=0$
$f(0,1)=0*1=0$
$f(1,0)=1*0=0$
$f(1,1)=1*1=1$

Alternatives[]

If no specific AND gates are available, one can be made from NAND or NOR gates, because NAND and NOR gates are "universal gates" ^[1] meaning that they can be used to make all the others.

Desired gate	NAND construction	NOR construction

References[]

^ Mano, M. Morris and Charles R. Kime. Logic and Computer Design Fundamentals, Third Edition. Prentice-Hall, 2004. p. 73.

[1] Mano, M. Morris and Charles R. Kime. Logic and Computer Design Fundamentals, Third Edition. Prentice-Hall, 2004. p. 73.

[1]

v t Logical connectives
Tautology/True $\top$
Alternative denial (NAND gate) $\uparrow$ Converse implication $\leftarrow$ Implication (IMPLY gate) $\rightarrow$ Disjunction (OR gate) $\lor$
Negation (NOT gate) $\neg$ Exclusive or (XOR gate) $\not \leftrightarrow$ Biconditional (XNOR gate) $\leftrightarrow$ Statement (Digital buffer)
Joint denial (NOR gate) $\downarrow$ Nonimplication (NIMPLY gate) $\nrightarrow$ Converse nonimplication $\nleftarrow$ Conjunction (AND gate) $\land$
Contradiction/False $\bot$
Philosophy portal