CER-12

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CER-12 (Central processor unit) 1971

CER (Serbian: Цифарски Електронски Рачунар – Digital Electronic Computer) model 12 was a third-generation digital computer developed by Mihajlo Pupin Institute (Serbia) in 1971 and intended for "business and statistical data processing" (see ref. Lit. #1 and #4). However, the manufacturer also stated, at the time, that having in mind its architecture and performance, it can also be used successfully in solving "wide array of scientific and technical issues" (ref. Lit.#2 and #3). Computer CER-12 consisted of multiple modules connected via wire wrap and connectors.

Central Unit[]

Primary memory

  • Type: magnetic core memory
  • Capacity: up to 8 modules, each consisting of 8 kilowords (1 word = 4 8-bit bytes).
  • Speed: cycle time: 1 μs, access time 0.4 μs.

Arithmetic unit contains:

Control Unit Control unit contains a program counter and instruction registers. It fetches instructions and facilitates program flow. It supports single-operand instruction set and works with all 16 index registers of the arithmetic unit.

Interrupt System Interrupt system of CER-12 consists of a number of dedicated registers and software. It supports up to 32 interrupt channels.

Control Panel Control panel of CER-12 allowed the operator to control and alter program flow and/or to eliminate errors detected by error-detection circuitry. It features a number of indicators and switches.

Operating system and other software[]

Following software was shipped with CER-12:

  • Operating System
  • "Symbolic programming language" and assembler (called "autocoder")
  • Input/output subroutines
  • A number of test programs
  • COBOL and FORTRAN IV compilers
  • Linear programming and PERT planning software
  • A library of applications and subroutines

Peripherals[]

  • 5-8 track, 500 characters per second punched tape reader
  • 5-8 track, 150 characters per second tape puncher
  • magnetic disk drive as secondary storage (4,096,000 characters per 6-disk, 10-surface volume organized into 100 cylinders with sixteen 1536-bit (48 processor words) sectors; track-to-track seek: 30 ms; rotational latency: 25 ms)
  • teleprinter
  • line printer (725 lines per minute for 64-character set or 880 lines per minute for 50-character set)

See also[]

Literature[]

  1. Vladislav Paunović: Arithmetic unit of the CER-12 computer, AUTOMATIKA, No 3, pp. 161–165, Zagreb 1971.
  2. Veselin Potić, Mihael Šavikin, I/O system of the CER-12 computer, AUTOMATIKA,No 3, pp. 166–176, Zagreb 1971.
  3. V Batanović, J.Kon (Ed): IMP Riznica znanja, pp. 5–8, M.Pupin Institute and PKS, Belgrade 2006. (in Serbian)
  4. Dušan Hristović: Development of the Computing Technology in Serbia (Razvoj Računarstva u Srbiji), PHLOGISTON journal, No 18-19, pp.89-105, Museum MNT, Belgrade 2010/2011, In Serbian.
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