Floyd M. Gardner

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Floyd M. Gardner (1929 – 2021) was a well-known expert and author in the area of phase lock loops (PLLs). The first, second, and third editions of his book Phaselock Techniques[1][2][3] have been highly influential and remain a well-recognized reference among electrical engineers specializing in areas involving PLLs. In 1980, Gardner was elected IEEE Fellow "for contributions to the understanding and applications of phase lock loops."

Gardner's conjecture on charge-pump phase-locked loops[]

He wrote an IEEE paper[4] dedicated to the description, the mathematical modeling, and the characterization of the widely used Charge-Pump Phase-Locked Loops (see references below). This paper constitutes a major tutorial for scientists and designers who want to discover this widely used mixed-signal system. Gardner derived a linear mathematical model of CP-PLL and, based on its analysis, conjectured that "transient response of practical charge-pump PLLs can be expected to be nearly the same as the response of the equivalent classical PLL"[4]: 1856  (Gardner’s conjecture on the similarity of transient responses of CP-PLL and equivalent classical PLL[5]).

Gardner's problem on the lock-in range[]

Floyd M. Gardner introduced "a lock-in range concept" for PLLs and posed the problem on its formalization (known as the Gardner problem on the lock-in range[6][7][8]). In the 1st edition of his book he introduced a lock-in frequency concept for the PLL in the following way:[1]: 40  "If, for some reason, the frequency difference between input and VCO is less than the loop bandwidth, the loop will lock up almost instantaneously without slipping cycles. The maximum frequency difference for which this fast acquisition is possible is called the lock-in frequency." Later, in the 2nd and 3rd edition of his book, Gardner noted that "despite its vague reality, lock-in range is a useful concept" and "there is no natural way to define exactly any unique lock-in frequency."[2]: 70 [3]: 187–188 

Some well-cited papers[]

  • "Charge-Pump Phase-Lock Loops", IEEE Transactions on Communications, Vol. COM-28, No. 11, November 1980
  • "Interpolation in digital modems-Part I: Fundamentals", IEEE Transactions on Communications, 1993 (cited 297 times)
  • "Interpolation in digital modems. II. Implementation and performance", IEEE Transactions on Communications, 1993 (cited 276 times)

References[]

  1. ^ a b Gardner, Floyd M. (1966). Phase-lock techniques. New York: John Wiley & Sons.
  2. ^ a b Gardner, Floyd M. (1979). Phase-lock techniques (2nd ed.). New York: John Wiley & Sons. ISBN 9780471042945.
  3. ^ a b Gardner, Floyd M. (2005). Phase-lock techniques (3rd ed.). New York: John Wiley & Sons. ISBN 9780471732686.
  4. ^ a b F. Gardner (1980). "Charge-pump phase-lock loops". IEEE Transactions on Communications. 28 (11): 1849–1858. Bibcode:1980ITCom..28.1849G. doi:10.1109/TCOM.1980.1094619.
  5. ^ Kuznetsov, N.V.; Matveev, A.S.; Yuldashev, M.V.; Yuldashev, R.V. (2021). "Nonlinear Analysis of Charge-Pump Phase-Locked Loop: The Hold-In and Pull-In Ranges". IEEE Transactions on Circuits and Systems I: Regular Papers. doi:10.1109/TCSI.2021.3101529.
  6. ^ Kuznetsov, N.V.; Lobachev, M.V.; Yuldashev, M.V.; Yuldashev, R.V. (2019). "On the Gardner problem for phase-locked loops". Doklady Mathematics. 100 (3): 568–570. doi:10.1134/S1064562419060218.
  7. ^ Leonov, G. A.; Kuznetsov, N. V.; Yuldashev, M. V.; Yuldashev, R. V. (2015). "Hold-in, pull-in, and lock-in ranges of PLL circuits: rigorous mathematical definitions and limitations of classical theory". IEEE Transactions on Circuits and Systems I: Regular Papers. IEEE. 62 (10): 2454–2464. arXiv:1505.04262. doi:10.1109/TCSI.2015.2476295. S2CID 12292968.
  8. ^ Kuznetsov, N.V.; Lobachev, M.Y.; Yuldashev, M.V.; Yuldashev, R.V. (2021). "The Egan problem on the pull-in range of type 2 PLLs". IEEE Transactions on Circuits and Systems II: Express Briefs. 68 (4): 1467–1471. doi:10.1109/TCSII.2020.3038075.


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