IBM System i

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IBM System i
IBM AS-400 9406-730.jpg
IBM AS/400e model 730
Also known asAS/400, AS/400e, eServer iSeries, eServer i5
ManufacturerIBM
TypeMidrange computer
Release dateJune 1988 (as AS/400)
DiscontinuedSep 30, 2013
Operating systemOS/400 (later known as i5/OS and IBM i)
CPUIMPI, IBM RS64, POWER
PredecessorIBM System/38,
IBM System/36
SuccessorIBM Power Systems running IBM i
Related articlesIBM System p

The IBM System i is a family of midrange computers from IBM. It was first introduced as the AS/400 (Application System/400) in June 1988, alongside the OS/400 operating system. It was intended as the successor to IBM's System/36 and System/38 platforms. Early AS/400 systems used the same IMPI architecture as the System/38, but later systems moved to the PowerPC-based IBM RS64.

In April 2008, System i and System p were consolidated into the IBM Power Systems platform. The i5/OS operating system was rebranded to IBM i, and retained full backwards compatibility with the previous hardware platforms when run on IBM Power Systems.[1]

History[]

Fort Knox and Silverlake[]

IBM AS/400 9404-B10 with a 5281 terminal

In the early 1980s, IBM management became concerned that IBM's large number of incompatible midrange computer systems were hurting the company's competitiveness, particularly against Digital Equipment Corporation's VAX.[2] In 1982, a project named Fort Knox commenced, which was intended to consolidate the System/36, the System/38, the IBM 8100, the Series/1 and the IBM 4300 series into a single product line based around the IBM 801 processor, while retaining backwards compatibility with all the systems it was intended to replace.[3] This project proved to be overly ambitious, and ran into multiple delays and changes of scope before being cancelled in 1985.

IBM AS/400
IBM System i 570 server (as of 2006)

During this time, a skunkworks project was started at IBM Rochester by engineers who believed that Fort Knox's failure was inevitable. These engineers developed code which allowed System/36 applications to run on top of the System/38,[4] and when Fort Knox was cancelled, their project was given official approval in December 1985.[5] The project became known as Silverlake (named for Silver Lake in Rochester, Minnesota).[6] Silverlake's goal was to deliver a replacement for the System/36 and System/38 in as short of a timeframe as possible, as the Fort Knox project had stalled new product development at Rochester, leaving IBM without a competitive midrange system.[7] The Silverlake system built upon IBM Rochester's attempts to consolidate the System/38 and System/36, and was essentially an evolution of the System/38 which reused some of the hardware and software developed for the Fort Knox project.[4][8]

Silverlake was available for field test in June 1988, and was officially announced in August of that year. By that point, it had been renamed to the Application System/400, and the operating system had been named Operating System/400.[4] The creators of the AS/400 originally planned to name it the System/40, but IBM had adopted a new product nomenclature around the same time, which led to the Application System/400 name.[5] Firstly, IBM began prefixing "System" in product names with words to indicate the intended use or target market of the system (e.g. Personal System/2 and Enterprise System/9000). Secondly, IBM decided to reserve one and two digit model numbers for personal systems (e.g. PS/2 and PS/55), three digit numbers for midrange systems (e.g. AS/400) and four digit numbers for mainframes (e.g. ES/9000). The reassignment of two digit model numbers from midrange systems to personal systems was to prevent the personal systems from running out of single-digit numbers for new products.

The move to PowerPC[]

See also: IBM RS64 § History

In 1990, IBM Rochester began work to replace the AS/400's original System/38-derived 48-bit CISC processors with a 96-bit architecture known as C-RISC (Commercial RISC).[3] Rather than being a clean-slate design, C-RISC would have added RISC-style instructions to the AS/400's processor, while maintaining backwards compatibility with the System/370-style Internal Microprogrammed Interface (IMPI) instruction set and the microcode used to implement it. In 1991, at the insistence of IBM president Jack Kuehler, a team at IBM Rochester under the leadership of Frank Soltis delivered a proposal to adapt the 64-bit PowerPC architecture to support the needs of the AS/400 platform.[9] Their derivative of the PowerPC, known Amazon and later as IBM RS64, was approved by IBM management instead of the C-RISC design, and formed the basis of the RISC AS/400 hardware.

Despite the move to an entirely different processor architecture, the platform's Technology Independent Machine Interface (TIMI) mostly hid the changes from users and applications, and transparently recompiled applications for the new processor architecture.[10] The port of OS/400 to the RS64 architecture required a rewrite of most of the code below the TIMI due to the use of IMPI microcode to implement significant quantities of the operating system's low level code.[5] This led to the creation of the System Licensed Internal Code (SLIC) - a new implementation of the lower levels of the operating system mostly written in C++.

Rebranding and Consolidation[]

The AS/400 product line was rebranded multiple times throughout the 1990s and 2000s.[10] It was re-branded multiple times by IBM - first as the AS/400 Advanced Series in 1994, followed by AS/400e (the e standing for e-business) in 1997.[5]

In 2000, IBM renamed the AS/400 to eServer iSeries, as part of its eServer branding initiative.[11] At that time, it adopted more PC server-like features, such as PS/2 keyboards and mice and VGA video output, mostly coming from IBM PS/2 and Intel server line (called eServer xSeries), replacing proprietary technologies. In 2001, it switched to the POWER4 processor from the PowerAS processors used by previous generations, meaning that iSeries systems now used the same processors as the pSeries systems which ran AIX. In 2004, the iSeries was rebranded to eServer i5 (along with OS/400 becoming i5/OS) the 5 signifying the use of POWER5 processors.[12]

In 2006, IBM rebranded the AS/400 line one last time to System i.[13] In April 2008, IBM consolidated the System i with the System p platform to create IBM Power Systems.[14] At the same time, i5/OS was renamed to IBM i, in order to remove the association with POWER5 processors.[15] With the consolidation of the System i and System p, IBM i is sold as one of the operating system options for Power Systems (along with AIX and Linux) instead of being tied to its own hardware platform.

Legacy[]

Although announced in 1988, the AS/400 remains IBM's most recent major architectural shift that was developed wholly internally. Since the arrival of Lou Gerstner in 1993, IBM has viewed such colossal internal developments as too risky. Instead, IBM now prefers to make key product strides through acquisition (e.g., the takeovers of Lotus Software and Rational Software) and to support the development of open standards, particularly Linux. After the departure of CEO John Akers in 1993, when IBM looked likely to be split up, Bill Gates commented that the only part of IBM that Microsoft would be interested in was the AS/400 division. (At the time, many of Microsoft's business and financial systems ran on the AS/400 platform, something that ceased to be the case around 1999, with the introduction of Windows 2000.[16][17][18])

Features[]

Instruction set[]

IBM AS/400e Model 150

One feature that has contributed to the longevity of the IBM System i platform is its high-level instruction set (called TIMI for "Technology Independent Machine Interface" by IBM), which allows application programs to take advantage of advances in hardware and software without recompilation. TIMI is a virtual instruction set independent of the underlying machine instruction set of the CPU. User-mode programs contain both TIMI instructions and the machine instructions of the CPU, thus ensuring hardware independence. This is conceptually somewhat similar to the virtual machine architecture of programming environments such as Java and .NET.

Unlike some other virtual-machine architectures in which the virtual instructions are interpreted at run time, TIMI instructions are never interpreted. They constitute an intermediate compile time step and are translated into the processor's instruction set as the final compilation step. The TIMI instructions are stored within the final program object, in addition to the executable machine instructions. This is how application objects compiled on one processor family (e.g., the original CISC AS/400 48-bit processors) could be moved to a new processor (e.g., PowerPC 64-bit) without re-compilation. An application saved from the older 48-bit platform can simply be restored onto the new 64-bit platform where the operating system discards the old machine instructions and re-translates the TIMI instructions into 64-bit instructions for the new processor.

The system's instruction set defines all pointers as 128-bit. This was the original design feature of the System/38 (S/38) in the mid 1970s planning for future use of faster processors, memory and an expanded address space. The original AS/400 CISC models used the same 48-bit address space as the S/38. The address space was expanded in 1995 when the RISC PowerPC RS64 64-bit CPU processor replaced the 48-bit CISC processor.

For 64-bit PowerPC processors, the virtual address resides in the rightmost 64 bits of a pointer while it was 48 bits in the S/38 and CISC AS/400. The 64-bit address space references main memory and disk as a single address set which is the single-level store concept.

Software[]

Main article: IBM i

The primary operating system of the System i platform is IBM i (originally known as OS/400). Many of the advanced features associated with the System i are implemented in the operating system as opposed to the underlying hardware, which changed significantly throughout the life of the AS/400 and System i platform.

Unlike the "everything is a file" feature of Unix and its derivatives, on IBM i everything is an object (with built-in persistence and garbage collection). Features include a RDBMS (DB2/400), a menu-driven interface, support for multiple users, block-oriented terminal support (IBM 5250), and printers. IBM i has built-in security, and support for communications, and web-based applications which can be executed inside the optional IBM WebSphere Application Server or as PHP/MySQL applications inside a native port of the Apache web server.[19]

System i is also capable of supporting multiple instances of AIX, Linux, Microsoft Windows 2000 and Windows Server 2003. While OS/400, AIX, and Linux are supported on the POWER processors on LPARs (logical partitions), Windows is supported with either single-processor internal blade servers (IXS) or externally linked multiple-processor servers (IXA and iSCSI).

Hardware[]

The AS/400 was originally based on a custom IBM CISC CPU which had an instruction set architecture, known as Internal Microprogrammed Interface (IMPI), similar to that of the IBM System/370.[20] It was later migrated to a POWER-based RISC CPU family eventually known as RS64.[21]

CPU in AS/400, iSeries, i5, Power Systems[]

The System i5 used POWER CPUs, which were developed and manufactured by IBM. The POWER 4/5/5+ chips contain two cores. There are Multi-Chip Modules (MCM) available. They have 2 CPUs (4 cores) or 4 CPUs (8 cores) in one MCM.

CPU Year Clock Speed Server-Models
IMPI[note 1] 1988 > 22Mhz [note 2] Current stable version: AS/400 Bxx, Cxx, Dxx, Exx, Fxx, Pxx, 100, 135, 140, 2xx, 3xx[23]
Cobra (A10) 1995 55 or 75 MHz 4xx, 5xx
Muskie (A25/A30) 1996 125 or 154 MHz 53x
Apache (RS64) (A35) 1997 125 MHz 6xx, 150
NorthStar (RS64 II) 1998 200, 255 or 262 MHz 170, 250, 7xx, 650, S40, SB1[24]
Pulsar (RS64 III) 1999 450 MHz Future release: iSeries;
System i 		270, 820
IStar (RS64 III upgraded) 2000 400, 500, 540 or 600 MHz 820, 830, 840,[25] SB2, SB3
SStar (RS64 IV) 2000 540, 600 or 750 MHz 270, 800, 810, 820, 830, 840
POWER4 2001 1.1 or 1.3 GHz 890
POWER4+ 2003 1.9 GHz 825, 870
POWER5 2004 1.5 or 1.9 GHz i5-520; i5-550; i5-570; i5-595
POWER5+ 2005 1.5 GHz (2005)
1.9 GHz(2005)
2.2 GHz
2.3 GHz 		i5-520, i5-550, i5-515, i5-525
i5-570
POWER6 2007 3.5 GHz
4.2 GHz
4.7 GHz 		BladeCenter JS12, JS22
i5-570 (MMA)
M50, M25 & M15
  1. ^ There were at least two generations of IMPI processors, the second was released in 1991.[22]
  2. ^ "The processor clock cycle is 45ns worst case."[22]

Models of AS/400, iSeries, i5 systems[]

Model Year CPU Group Base - CPW
B10, B20, B30, B35, B40, B45, B50, B60, B70 1988, 1989 P10, P20 2,9 - 20
C04, C06, C10, C20, C25 1990 P10 3,1 - 6,1
D02, D04, D06, D10, D20, D25, D35, D45, D50, D60, D70, D80 1991 P10, P20, P30 3,8 - 56,6
E02, E04, E06, E10, E20, E25, E35, E45, E50, E60, E70, E80, E90, E95 1992 P10, P20, P30, P40 4,5 - 116,6
F02, F04, F06, F10, F20, F25, F35, F45, F50, F60, F70, F80, F90, F95, F97 1993 P05, P10, P20, P30, P40 5,5 - 177,4
P01, P02, P03 1993-1995 P05 7,3 - 16,8
150 1996 P05 10,9 - 35,0
S10, S20, S30, S40 1997 P05, P10, P20, P30, P40, P50 45,4 - 4550
SB1, SB2, SB3 1997, 2000 P30, P40 1794 - 16500
10S, 100, 135, 140 1993-1995 P05, P10, P20 17,1 - 65,6
170 1998 P05, P10, P20 30 - 1090
200, 20S, 236 1994 P05, P10 7,3 - 17,1
250 2000 P05 50 - 75
270 2000 P05, P10, P20 50 - 2350
300, 30S, 310 1994 P10, P20, P30, P40 11,6 - 177,4
400, 40S, 436 1995 P05, P10 13,8 - 91,0
500, 50S, 510, 530, 53S 1995 P10, P20, P30, P40 18,7 - 650
600, 620, 640, 650 1997 P05, P10, P20, P30, P40, P50 22,7 - 4550
720 1999 P10, P20, P30 240 - 1600
730 1999 P20, P30, P40 560 - 2890
740 1999 P40, P50 3660 - 4550
800 2003 P05, P10 300 - 950
810 2003 P10, P20 750 - 2700
820 2000, 2001 P05, P10, P20, P30, P40 100 - 3700
825 2003 P30 3600 - 6600
830 2000, 2002 P20, P30, P40, P50 1850 - 7350
840 2000-2002 P40, P50 10000 - 20200
870 2002 P40, P50 7700 - 20000
890 2002 P50, P60 20000 - 37400
520 2004–2006 P05, P10, P20 500 - 7100
550 2004–2006 P20 3300 - 14000
570 2004–2006 P30, P40 3300 - 58500
595 2004–2006 P50, P60 24500 - 216000
515 2007 P05 3800 - 7100
525 2007 P10 3800 - 7100
570 2007 P40 16700 - 58500
MMA (9406) 2007 P30 5500 - 76900
M15 2008 P05 4300
M25 2008 P10 4300 - 8300
M50 2008 P20 4800 - 18000
MMA 2008 P30 8150 - 76900
JS12 2008 P05 7100
JS22 2008 P10 13800
JS23 2008
JS43 2008
570 (9117) 2008 P30 104800
595 (9119) 2008 P60 294700

See also[]

Preceded by
IBM RS/6000 		IBM System p
2000 - 2008
eServer pSeries
2000 		eServer p5
2004 		System p5
2005 		System p
2007
Succeeded by
IBM Power Systems
Preceded by
IBM System/36
IBM System/38 		IBM AS/400
1988 - 2008
Advanced/36, AS/Entry -
AS/400
1988 		AS/400e
1997 		eServer iSeries
2000 		eServer i5
2004 		System i5
2005 		System i
2006

References[]

  1. ^ Niccolai, James (April 2, 2008). "IBM merges System i and System p server lines". InfoWorld.
  2. ^ Roy A. Bauer; Emilio Collar; Victor Tang (1992). The Silverlake Project: Transformation at IBM. Oxford University Press. ISBN 9780195067545. Retrieved 2021-03-06.
  3. ^ Jump up to: a b Frank G. Soltis (1997). Inside the AS/400, Second Edition. Duke Press. ISBN 978-1882419661.
  4. ^ Jump up to: a b c Schleicher, David L. (2006-01-24). "An Interview with DAVID L. SCHLEICHER" (PDF). conservancy.umn.edu (Interview). Interviewed by Arthur L. Norberg. Charles Babbage Institute. Retrieved 2021-03-05.
  5. ^ Jump up to: a b c d Frank G. Soltis (2001). Fortress Rochester: the Inside Story of the IBM iSeries. System iNetwork. ISBN 978-1583040836.
  6. ^ Tom Huntington (2018-06-21). "Happy 30th Anniversary, IBM i!". helpsystems.com. Retrieved 2021-03-05.
  7. ^ Eric J. Wieffering (1992-05-23). "The brave new world of IBM Rochester". postbulletin.com. Retrieved 2021-03-06.
  8. ^ "Silverlake". wiki.midrange.com. 2006-08-21. Retrieved 2021-03-06.
  9. ^ John Paul Shen; Mikko H. Lipasti (30 July 2013). Modern Processor Design: Fundamentals of Superscalar Processors. Waveland Press. ISBN 978-1-4786-1076-2.
  10. ^ Jump up to: a b Tom Van Looy (January 2009). "The IBM AS/400: A technical introduction" (PDF). scss.tcd.ie. Retrieved 2021-03-13.
  11. ^ "IBM eServer iSeries 400". IBM. October 3, 2000.
  12. ^ Denny Insell (2004). "Introducing IBM eServer i5 & i5/OS" (PDF). IBM. Retrieved 2021-03-14.
  13. ^ Alex Woodie (2017-10-11). "IBM i Slow to Catch On, But What Does It Mean?". itjungle.com. Retrieved 2021-03-15.
  14. ^ Niccolai, James (April 2, 2008). "IBM merges System i and System p server lines". InfoWorld.
  15. ^ "IBM Introduces the First in a New Generation of Power Systems". IBM. 2008-04-02. Retrieved 2021-03-15.
  16. ^ Microsoft TechNet. "AS/400s extinct at Microsoft since 1999". Google discussion group, Microsoft runs AS/400's in-house - Article?. Retrieved 2007-05-16.
  17. ^ "Disparition des syst��mes AS/400 chez Microsoft depuis mai 1999". Archived from the original on 2012-11-06. Retrieved 2013-01-02.
  18. ^ "Microsoft Uses the iSeries to Run its Business". Blogspot,Confessions of An iSeries Priest. Retrieved 2006-03-05.
  19. ^ "Zend Solutions for IBM i".
  20. ^ David McKenzie. "Notes for storage research". Archived from the original on October 8, 1999.
  21. ^ Soltis, Frank G. "When Is PowerPC Not PowerPC?". The 400 Squadron. Archived from the original on January 8, 2008.
  22. ^ Jump up to: a b Schmierer, Q.G.; Wottreng, A.H. (1991). IBM AS/400 processor architecture and design methodology. IEEE International Conference on Computer Design: VLSI in Computers and Processors. pp. 440–443. doi:10.1109/ICCD.1991.139942.
  23. ^ "AS/400e System Handbook" (PDF). IBM. 1999-08-03. Retrieved 2021-03-21.
  24. ^ IBM.com. "V4R3 Questions and Answers". Reference # 8625668200695613. Retrieved 2007-04-04.[permanent dead link]
  25. ^ https://www-01.ibm.com/common/ssi/ShowDoc.wss?docURL=/common/ssi/rep_sm/5/897/ENUS9406-_h05/index.html&request_locale=en

External links[]

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