MIPS-X
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Bits | 32-bit |
---|---|
Introduced | 1987 |
Design | RISC |
Predecessor | Stanford MIPS |
MIPS-X is a microprocessor and instruction set architecture developed as a follow-on project to the MIPS project at Stanford University by the same team that developed MIPS. The project, supported by the Defense Advanced Research Projects Agency, started in 1984, and its final form was described in a set of papers released in 1986–87. Unlike its older cousin, MIPS-X was never commercialized as a workstation CPU, and has mainly been seen in embedded designs based on chips designed by Integrated Information Technology for use in digital video applications.
MIPS-X, while designed by the same team and architecturally very similar, is not instruction-set compatible with the mainline MIPS R-series processors. The processor is obscure enough that (as of November 20, 2005) support for it is provided only by specialist developers (such as Green Hills Software), and is notably missing from GCC.
MIPS-X has become important among DVD player firmware hackers, since many DVD players (especially low-end devices) use chips based on the IIT design[clarification needed] (and produced by ESS Technology) as their central processor. Devices such as the ESS VideoDrive SoC also include a DSP (co-processor) for decoding MPEG audio and video streams.
The Programmer's Manual describes the hsc instruction [halt and spontaneously combust]. This instruction is executed when a protection violation is detected, but is only present in the -NSA variant of the processor.[1] On other platforms, this type of instruction is known as Halt and Catch Fire.
References[]
- ^ hsc instruction, MIPS-X Instruction Set and Programmer's Manual, p. 65.
External links[]
- The original MIPS-X paper from Stanford.
- Instruction set architectures
- Microprocessors
- MIPS architecture
- Stanford University
- Microcomputer stubs