Bionz

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BIONZ is a line of image processors used in Sony digital cameras.

It is currently used in many Sony α DSLR and mirrorless cameras. Image processing in the camera converts the raw data from a CCD or CMOS image sensor into the format that is stored on the memory card. This processing is one of the bottlenecks in digital camera speed, so manufacturers put much effort into making, and marketing, the fastest processors for this step that they can.

Sony designs the circuitry of the processor in-house, and outsources the manufacturing to semiconductor foundries such as and (mostly) GlobalFoundries, as they currently do not own any fabrication plant capable of producing a system on a chip (SoC).[1] Sony also sources DRAM chips from various manufacturers namely Samsung, SK Hynix and Micron Technology.

BIONZ utilizes two chips in its design. The first chip is an SoC that manages overall functionality of the camera such as SD card storage management, wired connection such as USB and HDMI, and wireless protocols such as Wi-Fi and NFC that are increasingly common on modern Sony α cameras. The BIONZ SoC can be identified by its part number "CXD900xx". The second chip is the ISP (image signal processor). It handles the data directly from the CMOS image sensor, and it is directly responsible for the camera's high-ISO noise characteristics in a low-light environment. The ISP can be identified by the part number "CXD4xxx".

History of BIONZ chips in Sony cameras[]

BIONZ – MegaChips MA07170 and MA07171[]

The first camera to officially use a so-called BIONZ processor was the DSLR-A700 in 2007, utilizing the MA07170 chip from a (MCL) family of 32-bit RISC processors with MIPS R3000 core.

Similar MegaChips processors had been used in the DSLR-A100 (MA07169) as well as in the Konica Minolta 5D (MA07168) and 7D (MA07168), implementing Konica Minolta's CxProcess III running under 's /MIPS, an RTOS following the µITRON standard.

The MegaChips MA07170 was also used in the DSLR-A200, DSLR-A300, and DSLR-A350. The DSLR-A850 and DSLR-A900 used two such chips in parallel.

The MegaChips MA07171 was instead used in the DSLR-A230, DSLR-A290, DSLR-A330, DSLR-A380, and DSLR-A390.

BIONZ – Sony CXD4115 ISP[]

The first BIONZ processor to fully designed in-house by Sony utilized the Sony image processor in:

  • CXD4115 ISP - DSLR-A450, DSLR-A500, DSLR-A550 - still using a proprietary operating system (most probably NORTi as well).
  • CXD9974GG SoC with the revised CXD4115-1 ISP - DSLR-A560, DSLR-A580, SLT-A33, SLT-A35, SLT-A55 / SLT-A55V, NEX-5C, NEX-C3, and NEX-VG10 - all models from here on are Linux-based (CE Linux 6 with kernel 2.3.)

BIONZ – Sony CXD4132 ISP + CXD90016GF SoC[]

Sony CXD4132 series chip is a multicore BIONZ processor:

  • CXD4132 - SLT-A37, SLT-A57, SLT-A58, SLT-A65 / SLT-A65V, SLT-A77 / SLT-A77V, SLT-A99 / SLT-A99V / HV, NEX-F3, NEX-3N, NEX-5N,
  • CXD90016GF SoC with CXD4132 ISP - NEX-5R, NEX-5T, NEX-6, NEX-7 / Lunar
  • Unidentified - , , , , DSC-RX1 / DSC-RX1R, DSC-RX100 / Stellar, DSC-RX100M2

BIONZ X – Sony CXD4236 ISP + CXD90027GF SoC[]

Sony has introduced their next-generation image processor dubbed the BIONZ X with introduction of ILCE-7 / ILCE-7R in 2013. BIONZ X uses Sony CXD4236 series ISP along with CXD90027GF SoC. The latter is based on a quad-core ARM Cortex-A5 architecture,[2] and is utilized to run Android apps on top of the Linux kernel.

It features, among other things, detail reproduction technology and diffraction-reducing technology, area-specific noise reduction and 16-bit image processing + 14-bit raw output.[3] It can process up to 20 frames per second and features Lock-on AF and object tracking.[4]

BIONZ XR[]

Sony has introduced its next-generation image processor dubbed the BIONZ XR with the introduction of Sony α7S III in 2020. "The sensor is to have eight times as much computing power as the previous image processor."[7] It is also used in the Sony α1 flagship mirrorless camera, the , Sony FX3 compact cinema camera and mirrorless camera launched in 2021.

New Features[8]

  • New video codecs / framerates.
  • New downsampling power in the camera.
  • Internal Pipeline speed improvements.
  • Laggy interface fix.
  • New card formats/interface.
  • New EVF resolution/ readout speed
  • Fix of the viewfinder lag during AF or continuous shooting

See also[]

References[]

  1. ^ "生産拠点一覧|会社案内|ソニーセミコンダクタマニュファクチャリング株式会社". www.sony-semiconductor.co.jp. Archived from the original on 2019-07-13. Retrieved 2019-01-16.
  2. ^ [1]
  3. ^ 14-bit RAW output for rich gradations.
  4. ^ "Archived copy" (PDF). Archived from the original (PDF) on 2015-04-02. Retrieved 2015-03-31.{{cite web}}: CS1 maint: archived copy as title (link)
  5. ^ "Sony a7R II Teardown". iFixit. 2015-08-19. Retrieved 2019-01-16.
  6. ^ "A Teardown of the New Sony a7R III". petapixel.com. Retrieved 2019-01-16.
  7. ^ "Sony A7SIII - Full Specifications and Feature". Retrieved 2020-08-10.
  8. ^ "Sony A7SIII - Full Specifications and Feature". Retrieved 2020-08-10.

Further reading[]

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