3 µm process

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Semiconductor device fabrication
MOSFET scaling (process nodes)
010 µm – 1971 006 µm – 1974 003 µm – 1977  1.5 µm – 1981 001 µm – 1984 800 nm – 1987 600 nm – 1990 350 nm – 1993 250 nm – 1996 180 nm – 1999 130 nm – 2001 090 nm – 2003 065 nm – 2005 045 nm – 2007 032 nm – 2009 022 nm – 2012 014 nm – 2014 010 nm – 2016 007 nm – 2018 005 nm – 2020
Future 003 nm ~ 2022 002 nm ~ 2024
Half-nodes Density CMOS Device (multi-gate) Moore's law Transistor count Semiconductor Industry Nanoelectronics
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The 3 μm process is the level of MOSFET semiconductor process technology that was reached around 1977,^[1][2] by leading semiconductor companies such as Intel.

Products featuring 3 μm manufacturing process[]

• Intel 8085 CPU launched in 1976 was manufactured using 3.2 μm NMOS (HMOS) process.^{[3][failed verification]}
• Intel 8086 CPU launched in 1978 was manufactured using 3.2 μm NMOS (HMOS) process.^{[4][dubious – discuss]}
• Hitachi's 4 kbit HM6147 SRAM memory chip, launched in 1978, introduced the twin-well CMOS process, at 3 μm.^[5]
• Intel 8088 CPU launched in 1979 was manufactured using 3.2 μm NMOS (HMOS) process.^{[6][unreliable source?]}
• Motorola 68000 (MC68000) CPU, launched in 1979, was originally fabricated using an HMOS process with a 3.5 μm feature size.^{[7][circular reference]}
• The ARM1 was launched in 1985 and manufactured on a 3 μm process.^[8]

References[]

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